| 摘要 |
<p>A semiconductor memory device is provided to obtain sufficient channel current by generating an electric field in a part of a silicon substrate confronting a charge accumulation part by capacitive junction while reducing the critical voltage of the corresponding part. A step part(21b) of a table type is formed on one main surface of a semiconductor substrate(21). A first well(32) of a first conductivity type is formed in the surface region of the upper surface of the step part. A control electrode is formed on the step part by interposing a gate oxide layer. On the surface region of the one main surface of the semiconductor substrate, first and second impurity diffusion regions(28a,28b) are formed at both sides of the step part wherein the first and second impurity diffusion regions are of a second conductivity type different from the first conductivity type. Between the first well and the first and second impurity diffusion regions, a second well(34a,34b) of the first conductivity type is formed from a region adjacent to the first and second impurity diffusion region to the surface region of the lateral surface of the step part wherein the impurity density of the second well is lower than that of the first well. First and second charge accumulation parts(40a,40b) in which a bottom oxide layer(42a,42b), a charge accumulation layer(44a,44b), a top oxide layer(46a,46b) and a floating electrode(48a,48b) are sequentially stacked are positioned between the step parts, adjoining the step part and the control electrode.</p> |
