发明名称 PLL OUT-OF-SYNCHRONISM DETECTION CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To improve the detection accuracy of a PLL out-of-synchronism detection circuit in a PLL circuit for obtaining an output clock that is phase-synchronized with a reference clock from a voltage controlled oscillator. <P>SOLUTION: The PLL circuit having a phase comparator 1 for comparing a reference clock with an output clock of the voltage controlled oscillator 3 in phase to output a signal corresponding to a phase difference and a voltage controlled oscillator circuit for adjusting the frequency of the output clock by an output of the phase comparator to obtain an output clock phase-synchronized with the reference clock from the voltage controlled oscillator is provided with a timer 6 for measuring time, a counter 5 for counting the output clock of the voltage controlled oscillator and reset by a signal from the timer, and a detector for outputting a signal when a value counted by the counter exceeds a determination value and detecting out-of-synchronism in an output clock frequency increasing direction of the voltage controlled oscillator. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008147967(A) 申请公布日期 2008.06.26
申请号 JP20060332493 申请日期 2006.12.08
申请人 TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEM CORP 发明人 YOSHIDA SADAHIRO
分类号 H03L7/095 主分类号 H03L7/095
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