LATERAL JUNCTION FIELD-EFFECT TRANSISTOR

摘要

On p--type epitaxial layer (3), there are sequentially superimposed n-typ e epitaxial layer (4) and gate region (5). Gate electrode (12a) is electrica lly connected to the gate region (5), and source electrode (12b) and drain e lectrode (12c) are disposed with a spacing therebetween so as to interpose t he gate electrode (12a). Control electrode (12d) is for application, to the p--type epitaxial layer (3), of a voltage such that in off operation, the p- -type epitaxial layer (3) and the n-type epitaxial layer (4) fall in reverse bias states.