发明名称 STACKED PACKAGE, AND METHOD FOR MANUFACTURING THE SAME
摘要 <P>PROBLEM TO BE SOLVED: To easily and definitely cope with the narrowing of pitches and reduce a manufacturing cost with regard to a stacked package configured such that a semiconductor chip is electrically connected to a mounting substrate through an interposer and a method for manufacturing the same. <P>SOLUTION: The stacked package configured such that a plurality of packages 11A, 12A where semiconductor elements 20, 40, 41 are mounted on the substrates 14A, 15A are being electrically connected using a connection section and are being also stacked, wherein the connection section is configured by a columnar member 13A and solder joint portions 27, 47 and the configuration is made by supporting the upper layer package 12A by the columnar member 13A to the lower layer package 11A. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008147598(A) 申请公布日期 2008.06.26
申请号 JP20060336276 申请日期 2006.12.13
申请人 SHINKO ELECTRIC IND CO LTD 发明人 OI ATSUSHI;CHINO TERUAKI
分类号 H01L25/065;H01L25/07;H01L25/18 主分类号 H01L25/065
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