Electron blocking layers for gate stacks of nonvolatile memory devices

摘要

Methods and apparatuses for electronic devices such as non-volatile memory devices are described. The memory devices include a multi-Iayer control dielectric, such as a double or triple layer. The multi-layer control dielectric includes a combination of high-k dielectric materials such as aluminum oxide (Al 2 O 3 ), hafnium oxide (HfO 2 ), and/or hybrid films of hafnium aluminum oxide. The multi-layer control dielectric provides enhanced characteristics, including increased charge retention, enhanced memory program/erase window, improved reliability and stability, with feasibility for single or multistate (e.g., two, three or four bit) operation.
The gate stack (120) of the memory transistor comprises a tunnelling dielectric (202), a charge-storage layer (204), a charge-blocking layer (206) and a control dielectric layer (208). The charge-storage layer can comprise nanoparticles.