发明名称 Verfahren zur linearen Anordnung metallischer Sicherungsstrecken auf Wafern
摘要 Linear configurations of metallic fuse sections have a bit combination which represents a characteristic of a circuit on a wafer. The metallic fuse sections need to be rid of a polyimide layer covering them in order to make it possible to burn the fuse sections. In the event of unsatisfactory adherence to process parameters and insufficient removal of polyimide on the metallic fuse sections, a resulting relative error in a characteristic of the circuit is minimized according to the method since the fuse section corresponding to the most significant bit is neighbored on both sides by other fuse sections.
申请公布号 DE59814227(D1) 申请公布日期 2008.06.19
申请号 DE1998514227 申请日期 1998.06.10
申请人 INFINEON TECHNOLOGIES AG 发明人 KLETTE, RUEDIGER DR.
分类号 H01L23/525;H01L27/04;H01L21/66;H01L21/82;H01L21/822;H01L23/544 主分类号 H01L23/525
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