发明名称 |
Semiconductor memory device capable of easily performing delay locking operation under high frequency system clock |
摘要 |
A semiconductor memory device includes a first clock buffer for outputting a first internal clock signal in response to an inverted signal of the system clock signal and for correcting a duty cycle ratio of the first internal clock signal in response to a control signal; a second clock buffer for outputting a second internal clock signal in response to the system clock signal and for correcting a duty cycle ratio of the second internal clock signal in response to the control signal; an analog duty cycle correction circuit for outputting the control signal corresponding to the duty cycle ratio of the first and second internal clock signals; a mixing circuit for mixing the first and second internal clock signals and for outputting a third internal clock signal whose duty cycle is corrected; and a DLL circuit for outputting a delay-locked clock signal by using the third internal clock signal.
|
申请公布号 |
US2008136479(A1) |
申请公布日期 |
2008.06.12 |
申请号 |
US20060647645 |
申请日期 |
2006.12.29 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
YOU MIN-YOUNG;LEE SEONG-JUN |
分类号 |
H03L7/00 |
主分类号 |
H03L7/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|