发明名称 Semiconductor integrated circuit and method of designing the same
摘要 In a semiconductor integrated circuit, since resistance component is included in a power-supply wiring, a power-supply voltage supplied to a cell on a clock path is dropped to cause a clock skew. To avoid this problem, a cell-placement prohibiting area is set centering on a cell 10 on the clock path, and no cell for performing a logical operation is placed in this cell-placement prohibiting area. Also, a cell-placement prohibiting area may be set for each of cell groups formed of a plurality of cells closely placed together. Furthermore, a capacitive cell may be placed in the cell-placement prohibiting area.
申请公布号 US2008141202(A1) 申请公布日期 2008.06.12
申请号 US20080007413 申请日期 2008.01.10
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 MATSUMURA YOICHI;OHASHI TAKAKO;FUJIMURA KATSUYA;ITOH CHIHIRO;TANIGUCHI HIROKI
分类号 G06F17/50;G06F9/45;H01L21/82;H01L21/822;H01L27/04;H01L27/118 主分类号 G06F17/50
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