发明名称 Transistor arrangement in monocrystalline substrate having stress exerting insulators
摘要 In order to insulate active areas of n-type FETs and p-type FETs, insulator structures which due to production exert a tensile stress or a compressive stress on the respectively neighboring active areas, and which stress them accordingly, are provided in the semiconductor substrate in addition to the active areas formed by sections of a semiconductor substrate. The insulator structures are respectively established on a base section by which a tensile stress is induced in adjacent active areas. Insulator structures respectively next to a p-type FET are selectively provided with additional buffer layers by which, due to production, a compressive stress is induced in adjacent structures. The charge carrier mobility is increased both for electrons I n the channel regions of the n-type FETs and for holes in the channel regions of the p-type FETs, and the functionality is improved both for the n-type FETs and for the p-type FETs.
申请公布号 US7385256(B2) 申请公布日期 2008.06.10
申请号 US20050131938 申请日期 2005.05.17
申请人 INFINEONT TECHNOLOGIES AG 发明人 BIRNER ALBERT;GOLDBACH MATTHIAS
分类号 H01L29/76;H01L21/335;H01L21/762;H01L21/8234;H01L21/8238;H01L27/085;H01L29/745;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L29/76
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