| 摘要 |
<p>A method for manufacturing a flash memory device is provided to reduce a program disturbance by selectively changing ion implantation levels on a channel of a select line in one direction. A gate dielectric pattern(102a) is formed on a semiconductor substrate(100). A mask layer pattern(104) of which select line region is opened is formed on a semiconductor substrate on which the gate dielectric pattern is formed. A first ion implantation process is performed along the mask layer pattern and then the first mask layer pattern is removed. A gate pattern is formed on an upper portion of the gate dielectric pattern. A second ion implantation process is performed on the semiconductor substrate on which the gate pattern is formed. A first conductive layer, a dielectric, a second conductive layer, and a hard mask layer pattern are laminated on the gate dielectric pattern to form the gate pattern.</p> |
