发明名称 |
Method of performing salicide processes on MOS transistors |
摘要 |
A method of performing salicide processes on a MOS transistor, wherein the MOS transistor comprises a gate structure and a source/drain region, the method comprising: performing a selective growth process to form a silicon layer on the top of the gate and the source/drain region; performing an ion implantation process to form a retarded interface layer between the silicon layer and the gate and source/drain region; forming a metal layer on the silicon layer; and reacting the metal layer with the silicon layer for forming a silicide layer.
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申请公布号 |
US7384853(B2) |
申请公布日期 |
2008.06.10 |
申请号 |
US20050161990 |
申请日期 |
2005.08.25 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
CHEN MING-TSUNG;HUANG CHANG-CHI;TSAO PO-CHAO |
分类号 |
H01L21/331 |
主分类号 |
H01L21/331 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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