| 摘要 |
An apparatus and a method for controlling an on-die terminator in a semiconductor device are provided to reduce transition area with unknown ODT(On Die Termination) delay time after escaping from a power down mode of the semiconductor device. A control part(60) outputs a termination resistance control signal on the basis of an ODT(On Die Termination) signal asynchronous with a clock signal until an ODT signal synchronized with the clock signal is outputted. A termination resistance generation part generates termination resistance on the basis of the termination resistance control signal. The control part comprises a demultiplexer(320), a delay circuit and a termination resistance control signal generation part(360). The demultiplexer outputs the ODT signal asynchronous with the clock signal inputted to an input port in response to a power down mode escape signal indicating the power down mode escape time through a first output port, or outputs the ODT signal synchronized with the clock signal through a second output port. The delay circuit is connected to the second output port of the demultiplexer, and delays a signal outputted from the second output port. The termination resistance control signal generation part outputs a signal outputted from the first output port of the demultiplexer as the termination resistance control signal during ODT latency in response to a detection signal generated on the basis of the ODT signal and the power down mode escape signal, or outputs a signal outputted from the delay circuit as the termination resistance control signal.
|
