发明名称 Semiconductor device with a non-erasable memory and/or a nonvolatile memory
摘要 A semiconductor device comprises a plurality of memory cells, a central processing unit, a timer circuit which times a RESET time, and a timer circuit which times a SET time. A threshold voltage of an NMOS transistor of each memory cell is lower than that of the peripheral circuit, thereby easily executing a RESET operation. The direction of a flowing current is changed across the RESET operation and the SET operation, and the bit lines are activated at high speed, thus preventing system malfunctions. Further, the semiconductor device can overcome such problems as a wrong write operation and data destruction, resulting from the variation in the CMOS transistors when operating phase change elements with minimum size CMOS transistors at a core voltage (e.g. 1.2 V). According to the present invention, stable operations can be realized at a low voltage, using minimum-size cell transistors.
申请公布号 US7385838(B2) 申请公布日期 2008.06.10
申请号 US20070715918 申请日期 2007.03.09
申请人 RENESAS TECHNOLOGY CORP. 发明人 OSADA KENICHI;TAKEMURA RIICHIRO;TAKAURA NORIKATSU;MATSUZAKI NOZOMU;KAWAHARA TAKAYUKI
分类号 G11C11/00;G11C13/00;G06F13/00;G11C16/02;G11C16/10;G11C16/26;G11C16/34;G11C19/08;H01L27/10;H01L27/105 主分类号 G11C11/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利