发明名称 INTERNAL ROW SEQUENCER FOR REDUCING BANDWIDTH AND PEAK CURRENT REQUIREMENTS IN A DISPLAY DRIVER CIRCUIT
摘要 A display driver circuit includes a word line sequencer for providing a series of row addresses, and a row decoder for decoding each of the row addresses and asserting write signals on corresponding ones of a plurality of output terminals. An optional data path sequencer provides a series of path addresses which are used by an optional data router to route data to particular sub-rows of a display. Additionally, an optional sub-row sequencer provides a series of sub-row addresses to an optional sub-row decoder, which decodes each of the sub-row addresses and asserts write signals on corresponding ones of a second plurality of output terminals.
申请公布号 CA2310257(C) 申请公布日期 2008.06.10
申请号 CA19982310257 申请日期 1998.11.13
申请人 AURORA SYSTEMS, INC. 发明人 WORLEY, W. SPENCER III;PINKHAM, RAYMOND;HUDSON, EDWIN LYLE;CAMPBELL, JOHN GRAY
分类号 G09G3/20;G09G3/36 主分类号 G09G3/20
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