发明名称 MEMORY CELL LAYOUT AND PROCESS FLOW
摘要 A memory device (10) comprises an active area (16) comprising a source (20) and at least two drains (18) defining a first axis (A-A). At least two substantially parallel word lines (12) are defined by a first pitch, with one word line (12) located between each drain (18) and the source (20). Digit lines (14) are defined by a second pitch, one of the digit lines (14) being coupled to the source (20) and forming a second axis (B-B). The active areas (16) of the memory array are tilted at 45° to the grid defined by the word lines (12) and digit lines (14). The word line pitch is about 1.5F, while the digit line pitch is about 3F.
申请公布号 KR20080051152(A) 申请公布日期 2008.06.10
申请号 KR20087007865 申请日期 2006.08.28
申请人 MICRON TECHNOLOGY, INC. 发明人 HALLER GORDON A.;HWANG DAVID K.;TANG SANH DANG;ROBERTS CEREDIG
分类号 H01L21/34 主分类号 H01L21/34
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