发明名称 WAVESCALAR ARCHITECTURE HAVING A WAVE ORDER MEMORY
摘要 A dataflow instruction set architecture and execution model, referred to as WaveScalar, which is designed for scalable, low-complexity/high-performance processors, while efficiently providing traditional memory semantics through a mechanism called wave-ordered memory. Wave-ordered memory enables "real-world" programs, written in any language, to be run on the WaveScalar architecture, as well as any out-of-order execution unit. Because it is software-controlled, wave-ordered memory can be disabled to obtain greater parallelism. Wavescalar also includes a software-controlled tag management system.
申请公布号 US2008133882(A1) 申请公布日期 2008.06.05
申请号 US20080017480 申请日期 2008.01.22
申请人 发明人 OSKIN MARK H.;SWANSON STEVEN J.;EGGERS SUSAN J.
分类号 G06F15/76;G06F9/30 主分类号 G06F15/76
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