发明名称 Nonvolatile semiconductor memory device
摘要 In a control order of non-selected blocks at the time of data erase operation of one or a plurality of blocks, the control gate line is controlled to ground potential at first, then subsequently, a transfer transistor of the non-selected blocks is set to be an off-state. Next, high voltage is supplied to the well region and the data of the selected block is erased. Then, the control gate line is charged to the voltage which is used, for instance, at the time of reading out, or to the voltage (Vcg) which is used at the verification (Vcg). After the control gate line is charged to Vcg, the erase voltage supplied to the well region is discharged. Then, the control gate line is returned to ground potential after completing the discharge of the well region, and thus the data erase operation of the block is completed.
申请公布号 US7382651(B2) 申请公布日期 2008.06.03
申请号 US20060616122 申请日期 2006.12.26
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAGAO OSAMU;FUKUDA YASUYUKI;MUKAI HIDEO
分类号 G11C16/00 主分类号 G11C16/00
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