| 摘要 |
A TFT(Thin Film Transistor) array substrate and a manufacturing method thereof are provided to pattern a gate line layer, form an etching stopper, integrally pattern a semiconductor layer, n+a-Si and data line layer, and pattern a pixel electrode and oxidation preventing layers, thereby forming the TFT array substrate by using an exposure mask four times and accordingly simplifying processes and reducing process costs. A gate line layer comprises a gate line formed on a substrate, a gate electrode(112a) branched from the gate line, and a gate pad(122) formed in an end of the gate line. A semiconductor layer(114) is insulated from the gate line layer by an gate insulating layer. An etching stopper(150a) covers a channel part of the semiconductor layer. A data line layer comprises a data line(115) crossing the gate line, source/drain electrodes(115a,115b) respectively formed in both sides of the semiconductor layer and having edges on the same line as a partial edge of the semiconductor layer, and a data pad(125) formed in an end of the data line. In lower parts of the data line and the data pad, semiconductor layer forming material is further formed with the same pattern. A passivation layer(116) covers the data line layer. A pixel electrode(117) is contacted with the drain electrode in an area where the passivation layer is removed, and formed on a substrate where the gate insulating layer and the passivation layer are removed. A first oxidation preventing layer(151) is formed in an area where the gate insulating layer and the passivation layer are removed, and covers the gate pad. A second oxidation preventing layer(152) is formed in an area where the passivation layer is removed, and covers the data pad. In a lower part of the data line layer, an n+a-Si(104a) of the same pattern as the data line layer is further formed. |
