发明名称 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR ERASING THE SAME
摘要 A semiconductor memory device and a method for erasing the same are provided to suppress threshold voltage shift of dummy cells due to repetitive erase operations, by pre-programming the dummy cells to boost a threshold voltage before total erase of a block. A semiconductor memory device includes a memory cell array arranged with NAND cell units. The NAND cell unit comprises a plurality of electrically programmable nonvolatile memory cells connected serially, a first and a second selection gate transistor(SG1,SG2) and a dummy cell(MCDD,MCDS). The first and the second selection gate transistor are arranged to connect both ends of the NAND cell unit to a bit line and a source line. The dummy cell is arranged adjacently to the first and the second selection gate transistor. The memory cell except the dummy cell is soft-programmed after the memory cell is erased in an erase unit.
申请公布号 KR20080048419(A) 申请公布日期 2008.06.02
申请号 KR20070121654 申请日期 2007.11.27
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAKAMURA DAI;HOSONO KOJI
分类号 G11C16/10;G11C16/16 主分类号 G11C16/10
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