发明名称 INTERCONNECT STRUCTURE WITH LINE RESISTANCE DISPERSION
摘要 A semiconductor device is provided. The semiconductor device includes a region of closely packed lines and a region including an isolated line, separated by a region of carbon doped silicon oxide. As the surface of the semiconductor device is etched, the etching rate varies depending on the material being etched. Accordingly, the cross-sectional area of the isolated line must be adjusted to compensate for the slowed etching process in that region. The close packed lines may have a height, a, and a width, b thus having a cross-sectional area of a*b. However, the isolated line may have a height D*a, and a width, E*b, where D*E=1. Singular or multiple etching processes may used and the line widths adjusted accordingly.
申请公布号 US2008122089(A1) 申请公布日期 2008.05.29
申请号 US20060557674 申请日期 2006.11.08
申请人 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 发明人 IIJIMA TADASHI
分类号 H01L23/528 主分类号 H01L23/528
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