发明名称 METHOD OF TRANSLATING N TO N INSTRUCTIONS EMPLOYING AN ENHANCED EXTENDED TRANSLATION FACILITY
摘要 A method, article, and system for providing an effective implementation of assembler language translate-n-to-n instructions implemented on 21, 31, and 64-bit architectures, while maintaining backward compatibility with existing systems. The enhanced Extended-Translation Facility 2 (ETF2) instruction set introduces a new operand in an unused field (M<SUB>3</SUB>) that facilitates a change in the original instruction format and its intended function. With the ETF2-Enhancement Facility installed, a value of zeros in the M<SUB>3 </SUB>field indicates that instruction operation is to continue as originally defined. When a nonzero value is coded in the M<SUB>3 </SUB>field a new function is carried out. The assembler accommodates the changes by making the new M<SUB>3 </SUB>field optional when coding the instructions. If the M<SUB>3 </SUB>field is not coded, the assembler defaults to providing zeros in the M<SUB>3 </SUB>field (as found in the original instruction format), and backward compatible operation is provided.
申请公布号 US2008126763(A1) 申请公布日期 2008.05.29
申请号 US20060469919 申请日期 2006.09.05
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 EHRMAN JOHN R.;FULTON MIKE S.;GREINER DAN F.
分类号 G06F9/318 主分类号 G06F9/318
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