发明名称 METHOD FOR REDUCING VIA INDUCTANCE IN ELECTRONIC ASSEMBLY AND ARTICLE
摘要 PROBLEM TO BE SOLVED: To provide a method of making a low-impedance conductive via by forming a first conductive layer in a laminated substrate. SOLUTION: A first dielectric layer 94 is formed on the first conductive layer 102. A second conductive layer 100 is formed on the first dielectric layer 94. A first conductive path is formed in the first conductive layer 100 extending along a first route between a first node and a second node. A first conductive blind via 108 is connected to the first conductive path at the second node, with the first blind via 108 being formed in the first dielectric layer 94 at the second node. Lastly, a second conductive path is formed in the second conductive layer 100 that is connected to the first blind via 108. The second conductive path extends between a third node and the first blind via 108 along a second route. The second route corresponds identically to at least a portion of the first route. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008124473(A) 申请公布日期 2008.05.29
申请号 JP20070291732 申请日期 2007.11.09
申请人 W L GORE & ASSOC INC 发明人 HANSON DAVID A
分类号 H01L23/12;H01L21/48;H01L23/498;H01L23/538;H01L23/66;H05K1/11;H05K3/46 主分类号 H01L23/12
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