发明名称 A method for boron contamination reduction in IC fabrication
摘要 In order to reduce boron concentration between a silicon substrate and an Si or Si 1-x Ge x layer which is epitaxially grown in a CVD (chemical vapor deposition) apparatus, the silicon substrate is pretreated, before being loaded into the CVD apparatus, such as to prevent the substrate from being contaminated by boron in a clean room. Further, in accordance with one embodiment, a CVD growth chamber itself is cleaned, before the substrate is loaded into the growth chamber, using an F 2 gas at a predetermined temperature of the substrate, thereby to remove boron residues in the growth chamber;
申请公布号 EP1926133(A2) 申请公布日期 2008.05.28
申请号 EP20080002854 申请日期 1997.11.20
申请人 NEC ELECTRONICS CORPORATION 发明人 AOYAMA, TOHRU;SUZUKI, TATSUYA
分类号 H01L21/306;C23C16/02;C23C16/44;C30B25/18;H01L21/205;H01L21/265 主分类号 H01L21/306
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