| 摘要 |
A DLL circuit and a controlling method of the same are provided to perform stably a phase delay lock operation by generating a control voltage for making electric potential higher than a level of a ground voltage. A clock selection control unit(40) generates a clock selection signal and an initialization signal corresponding to an input of a phase comparison signal. A clock selection unit(50) outputs a delay reference clock. The delay reference clock is one of divided clocks corresponding to the clock selection signal. An initial voltage generation unit(100) generates an initial voltage from an external power supply source according to an enabling state of the initialization signal. A delay control unit(110) receives a pull-up signal, a pull-down signal, and the initial voltage and outputs a control voltage. A delay unit(60) delays the delay reference clock according to a control of the control voltage.
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