发明名称 Semiconductor stacked package assembly having exposed substrate surfaces on upper and lower sides
摘要 Stacked package assemblies include first and second stacked packages, each having at least one die affixed to, and electrically interconnected with, a die attach side of the package substrate. One package is inverted in relation to the other, that is, the die attach sides of the package substrates face one another, and the "land" sides of the substrates face away from one another. Z-interconnection of the packages is by wire bonds connecting the first and second package substrates. The assembly is encapsulated in such a way that both the second package substrate (one side of the assembly) and a portion of the first package substrate (on the opposite side of the assembly) are exposed, so that second level interconnection and interconnection with additional components may be made. One or more additional components may be stacked over the land side of the first package substrate.
申请公布号 US7372141(B2) 申请公布日期 2008.05.13
申请号 US20060395529 申请日期 2006.03.31
申请人 STATS CHIPPAC LTD. 发明人 KARNEZOS MARCOS;SHIM IL KWON;HAN BYUNG JOON;RAMAKRISHNA KAMBHAMPATI;CHOW SENG GUAN
分类号 H01L23/02;H01L21/00;H05K1/14 主分类号 H01L23/02
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