发明名称 METHODS AND APPARATUS FOR A QUAD FLAT NO-LEAD (QFN) PACKAGE
摘要 <p>Methods and apparatus are provided for decreasing the size of Quad Flat No-Lead (QFN) packages (300, 400) down to chip-scale packages. Such QFN packages include a first semiconductor chip (310, 410), a plurality of recessed leads (306, 406, 408, 411) having mold lock features, and a mold material 340, 440 substantially encasing all sides of the semiconductor chip. An active surface (314, 414) of the semiconductor chip is oriented toward a mounting side (307, 407) of the QFN package, and a plurality of wire bonds 330, 430 disposed between the active surface and the mounting side couple the active side to the leads. The QFN packages may also include a second semiconductor chip (452) coupled to a plurality of leads (408) and to the first semiconductor chip via wire bonds (431, 432) in a manner similar to the first semiconductor chip.</p>
申请公布号 WO2008054929(A2) 申请公布日期 2008.05.08
申请号 WO2007US78444 申请日期 2007.09.14
申请人 FREESCALE SEMICONDUCTOR INC.;WANG, JAMES, J.;MCDONALD, WILLIAM, G. 发明人 WANG, JAMES, J.;MCDONALD, WILLIAM, G.
分类号 H01L23/02 主分类号 H01L23/02
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