| 摘要 |
An imager in which a column line bias current control signal is pulsed at some time during and/or after the pulsing of the reset control and the transfer control signals to increase a bias current in a pixel column line during reset and transfer operations. The bias current is then decreased by removing the pulse before the sampling and storing of reset and image signals. Pulsing the bias control voltage signal and thus, the bias current, decreases the settling time of the column line, while maintaining the required low current during sampling and storage of the reset and image signals.
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