发明名称 |
Input termination circuitry with high impedance at power off |
摘要 |
An input termination circuit includes a first and a second resistor each having a terminal respectively coupled to a first and a second input terminal of the input termination circuit, a first and a second transistor coupled in series between the first resistor and the second resistor, and a third transistor having two terminals respectively coupled to the control circuit and a node between the first and the second transistor. The gate of the third transistor is coupled to ground. The gates of the first and the second transistor are coupled to a control circuit that is adapted to provide a control signal to turn the first and the second transistor on or off.
|
申请公布号 |
US7368938(B2) |
申请公布日期 |
2008.05.06 |
申请号 |
US20060455074 |
申请日期 |
2006.06.15 |
申请人 |
INTEGRATED DEVICE TECHNOLOGY, INC. |
发明人 |
DING XUEXIN;WANG HONGQUAN;ZHANG WEIFENG |
分类号 |
H03K17/16;H03K19/003 |
主分类号 |
H03K17/16 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|