发明名称 BIAS CIRCUIT
摘要 <p>A bias circuit comprises first and second transistors (MN1,MN2) each of which receives a common gate voltage; a load circuit (MP1,MP2) that is connected to the drains of the first and second transistors; a control circuit (MP3,MN3) that generates a control signal based on a signal from the load circuit; a current source (MN4) that is controlled by the control signal and connected commonly to the first and second transistors; and a first impedance circuit (R) that is connected between the second transmitter and the current source.</p>
申请公布号 WO2008050375(A1) 申请公布日期 2008.05.02
申请号 WO2006JP319570 申请日期 2006.09.29
申请人 FUJITSU LIMITED;KUDO, MASAHIRO 发明人 KUDO, MASAHIRO
分类号 G05F3/30 主分类号 G05F3/30
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