发明名称 Integrated matching network and method for manufacturing integrated matching networks
摘要 An integrated matching network and method for manufacturing an integrated matching network are provided. The method includes forming ( 405 ) a first die on a substrate, forming ( 410 ) a second die on the substrate, and forming ( 415 ) a metallization layer on the first and second dies. The second die has a capacitance, the metallization layer has an inductance, and the capacitance and inductance together provide a shunt impedance from the first die to the substrate. The integrated matching network includes a first die having a PA ( 101 ), a second die having a capacitor ( 102 ), and a metal interconnect ( 108 ) coupled to the PA and the first capacitor. The metal interconnect ( 108 ) has an inductance. The capacitor ( 102 ) and metal interconnect ( 108 ) form a shunt impedance.
申请公布号 US2008099800(A1) 申请公布日期 2008.05.01
申请号 US20060586807 申请日期 2006.10.25
申请人 发明人 MILLER MELVY F.;FOERSTNER JUERGEN A.
分类号 H01L29/80;H01L23/48 主分类号 H01L29/80
代理机构 代理人
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