| 摘要 |
A circuit uses a differential voltage response to identify fabrication process defects that would result if an IC design is fabricated (without re-designing to correct such defects). The circuit includes two stacks, whose respective outputs may be compared by a comparator, and comparator's output used to determine defectivity. In some embodiments, each stack includes a first-type device (e.g. a p-channel device) and at least two second-type devices (e.g. n-channel devices). The first-type device is used as a current source or as a select switch (depending on the mode of operation of the differential voltage defectivity monitoring circuit). One second-type device may be used as a select switch and for back-bias control, while another second-type device may be used as a blocking switch and/or a select switch. The circuit may be built into an addressable array of multiple test structures that have digitally multiplexed control lines, in some embodiments.
|
