发明名称 ADAPTIVE EQUALIZER CIRCUIT AND ITS METHOD, AND SIGNAL PROCESSOR
摘要 PROBLEM TO BE SOLVED: To suppress read errors in reproducing with a simple configuration. SOLUTION: The adjusting module 22 equalizes a waveform of an input reproduction signal to output an equalized reproduction signal to a binarizer 28 and a PLL circuit 23. The PLL circuit 23 detects evaluation of a phase equalized reproduction signal, a phase difference between a reproduction signal and a clock, and also an inversion interval of the reproduction signal, and controls a VCO circuit 27 to synchronize the clock and the reproduction signal. The adaptive equalizer controller 24 adjusts an equalizer coefficient of an equalizer 41 to an optimal value for the present reproduction signals based on the data detected by the PLL circuit 23. This invention is applicable to a signal processor processing the reproduction signal read from a recording medium. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008103021(A) 申请公布日期 2008.05.01
申请号 JP20060284604 申请日期 2006.10.19
申请人 SONY CORP 发明人 AOKI TOSHIMASA;NOGUCHI TATSUMI
分类号 G11B20/10;H03H21/00 主分类号 G11B20/10
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