发明名称 |
Systems and methods for synchronizing an input signal |
摘要 |
Systems and methods for synchronizing an input signal with a substantial mitigation of race conditions and a substantial increase in resolving time are provided. One embodiment includes a system comprising a first latching device configured to latch a first output signal from the input signal and a delay element configured to receive the first output signal and output a delay signal that is a delayed version of the first output signal. The system also includes a pass-gate element configured to receive the first output signal and to output a second output signal in response to a logic state of the delay signal. The second output signal has a delayed input edge without a delayed resolving edge. The system can be configured to force the first output signal to a stable logic state in response to the first output signal having a metastable state.
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申请公布号 |
US2008101513(A1) |
申请公布日期 |
2008.05.01 |
申请号 |
US20060588459 |
申请日期 |
2006.10.27 |
申请人 |
HEWLETT-PACKARD COMPANY |
发明人 |
ZHU ZHUBIAO;HENRION CARSON DONAHUE;BERKRAM DANIEL ALAN |
分类号 |
H04L7/00 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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