| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a clock enabler for distributing a clock to a flip-flop that triggers both the edges of the rising edge and the falling edge of the clock. <P>SOLUTION: An exclusive-OR gate 230 generates non-coincidence between a clock CK and a latch 270. A latch 240 allows an input from the exclusive-OR gate 230 pass, while an enable signal EN is at logic L (invalid) and holds the input immediately prior to the enable signal, when the enable signal is shifted to a logic H (valid). A selector 220 selects either the non-inverted signal of the clock or an inversion signal, with the output of the latch 240 set as a selection signal. The latch 270 allows the input from the selector 220, while the enable is at the logic H and holds an input immediately prior to an enable signal, when the enable signal is shifted to logic L. When the enable signal is shifted from the logic L to the logic H, a clock is output from an output terminal X, with its stopped level set as a restarting point. <P>COPYRIGHT: (C)2008,JPO&INPIT |
