发明名称 AUTOMATA UNIT, A TOOL FOR DESIGNING CHECKER CIRCUITRY AND A METHOD OF MANUFACTURING HARDWARE CIRCUITRY INCORPORATING CHECKER CIRCUITRY
摘要 The present invention relates to an automata unit, a tool for designing circuitry and/or checker circuitry, and a method for manufacturing hardware circuitry. The automata unit includes an input unit for receiving assertions using Boolean expressions, an automata generator for translating the assertions into automata, and an automata adaptor. The automata generator uses a dual layer symbolic alphabet for representing the assertions, and the automata adaptor adapts automata algorithms so as to support the symbolic alphabet in the generated automata. The tools for designing circuitry and checker circuitry rely on the automata unit, and further include an assertion unit and either a circuit generator or a checker generator.
申请公布号 US2008082946(A1) 申请公布日期 2008.04.03
申请号 US20070864030 申请日期 2007.09.28
申请人 MCGILL UNIVERSITY 发明人 ZILIC ZELJKO;BOULE MARC
分类号 G06F17/50 主分类号 G06F17/50
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