| 摘要 |
A semiconductor memory and a system are provided to reduce current consumption, by decreasing a charging/discharging current by circuit operation to reduce a GIDL(Gate Induced Drain Leakage) current. A plurality of memory blocks has a memory cell and a word line connected to the memory cell. A word control circuit(WCNT) is formed in correspondence to the memory block, and enables/disables the level of the word line. Each word control circuit includes a word decoder(WDEC), a word driver(WDRV) and a voltage control circuit. The word decoder enables a word control circuit with a low level voltage during access period of a corresponding memory block, and disables the word control line with a high level voltage during non-access period of a corresponding memory block. The word driver has a transistor receiving the word control signal through a gate and having an output connected to the word line, and enables the word line selected by an address during the access period, and disables the word line during the non-access word line. The voltage control circuit connects a high level voltage line for supplying the high level voltage for the word control signal to the word decoder to a first high voltage line supplied with a first high voltage during the access period of the corresponding memory block, and connects the high level voltage line to a second high voltage line supplied with a second high voltage lower than the first high voltage during the non-access period of the corresponding memory block.
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