发明名称 STRUCTURES AND METHODS FOR FORMING SHIELDED GATE FIELD EFFECT TRANSISTORS
摘要 A field effect transistor is formed as follows. A trench is formed in a semiconductor region. A dielectric layer lining the trench sidewalls and bottom is formed. The trench is filled with a conductive material. The conductive material is recessed into the trench to thereby form a shield electrode in a bottom portion of the trench. The recessing of the conductive material includes isotropic etching of the conductive material. An inter-electrode dielectric (IED) is formed over the recessed shield electrode. ® KIPO & WIPO 2008
申请公布号 KR20080027899(A) 申请公布日期 2008.03.28
申请号 KR20087002372 申请日期 2006.06.29
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION 发明人 GREBS THOMAS E.;RIDLEY RODNEY S.;KRAFT NATHAN LAWRENCE;DOLNY GARY M.;YEDINAK JOSEPH A.;KOCON CHRISTOPHER BOGUSLAW;CHALLA ASHOK B.
分类号 H01L21/336 主分类号 H01L21/336
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