ACCESS EXECUTION DEVICE, CACHE MEMORY, DATA STORAGE DEVICE, AND READ-OUT ACCESS METHOD

摘要

Four cache memories (1a to 1d) operate in parallel. For this, it is possible to simultaneously extract four data. Addresses (1 to 4) access corresponding cache memories (1a to 1d). In this configuration, for example, suppose that a cache mistake has occurred in the cache memories (1a, 1b) for address 1 and address 2. Before extracting data from a main storage (3), a selection control unit (4) performs control to output the address 1 to the cache memory 1b, 1d and the address 2 to the cache memories 1a, 1c. Thus, the selection control unit (4) performs a read-out access to other cache memories than the cache memories where a cache mistake has occurred. This suppresses the performance lowering caused by penalty of the cache mistake.