| 摘要 |
PROBLEM TO BE SOLVED: To improve a timing delay of reading/writing data by supplying a boosted voltage to a clock tree. SOLUTION: A memory includes a memory bank array, a DQ region, a clock tree, and a voltage generator. Boosted voltages (VCLKP) are supplied to the components of the cock tree 6 by the voltage generator. The boosted voltage improves performance of the clock tree to shorten a clock tree delay. Thus, data is surely clocked by a data bus to improve tAC performance. COPYRIGHT: (C)2008,JPO&INPIT
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