| 摘要 |
A memory control apparatus in which, in the case of a sequence of requests for a sequence of accesses from an access unit to result in execution of an operation in the memory, the access unit is granted right to use the memory control apparatus to carry out the sequence of accesses and every other access unit is denied right to use the memory control apparatus to access the memory until all of the accesses in the sequence of accesses have been carried out.
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