发明名称 Midpoint potential generating circuit for use in a semiconductor device
摘要 An object of the invention is to improve a defect caused at the time of starting a midpoint potential generating circuit for use in a semiconductor device. A bias generating circuit supplies a grounding potential as a bias voltage Vbias and sets a midpoint potential of capacitors C 1 and C 2 to a grounding potential when a supply voltage VDD is lower than a first reference voltage. When the supply voltage VDD is equal to or higher than the first reference voltage, the bias generating circuit supplies the supply voltage VDD as the bias voltage Vbias. When the bias voltage Vbias is equal to or higher than a second reference voltage, the bias generating circuit supplies a voltage obtained by dividing the supply voltage VPP of the booster power supply circuit as the bias voltage Vbias to a node of the capacitors C 1 and C 2.
申请公布号 US7348835(B2) 申请公布日期 2008.03.25
申请号 US20070802454 申请日期 2007.05.23
申请人 FUJITSU LIMITED 发明人 YAMAZAKI MASAFUMI;TAKEUCHI ATSUSHI
分类号 G05F1/10;G05F3/02 主分类号 G05F1/10
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