发明名称 |
TEST CONTROL CIRCUIT BLOCKING DIRECT CURRENT PATH IN WAFER LEVEL TEST AND METHOD THEREOF |
摘要 |
A test control circuit for blocking direct current path in a wafer level test and a method thereof are provided to perform the wafer level test efficiently without loss of a voltage applied to a test pad. A test pad(110) applies a test voltage from the outside when a wafer level test for a memory device is performed. An input buffer(120) receives and outputs the test voltage to an internal circuit when the wafer level test is performed. A current blocking part(130) blocks a direct current path from the test pad to a ground voltage in response to a control signal when the wafer level test is performed.
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申请公布号 |
KR20080025541(A) |
申请公布日期 |
2008.03.21 |
申请号 |
KR20060090150 |
申请日期 |
2006.09.18 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, JOUNG YEAL;KIM, SUNG HOON |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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主权项 |
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地址 |
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