发明名称 |
SCALABLE ELECTRICALLY ERASEABLE AND PROGRAMMABLE MEMORY |
摘要 |
<p>A non-volatile memory including one or more EEPROM cell pairs. Each EEPROM cell pair includes three transistors and stores two data bits, effectively providing a 1.5 transistor EEPROM cell. An EEPROM cell pair includes a first non-volatile memory transistor, a second non-volatile memory transistor and a source access transistor. The source access transistor includes: a first source region continuous with a source region of the first non-volatile memory transistor; a second source region continuous with a source region of the second non-volatile memory transistor, and a drain region that extends downward through a first well region to contact a second well region. The first, second and third semiconductor regions and the second well region have a first conductivity type, and the first well region has a second conductivity type, opposite the first conductivity type.</p> |
申请公布号 |
WO2008030796(A2) |
申请公布日期 |
2008.03.13 |
申请号 |
WO2007US77514 |
申请日期 |
2007.09.04 |
申请人 |
CATALYST SEMICONDUCTOR, INC.;GEORGESCU, SORIN S.;COSMIN, PETER;SMARANDOIU, GEORGE |
发明人 |
GEORGESCU, SORIN S.;COSMIN, PETER;SMARANDOIU, GEORGE |
分类号 |
H01L29/788 |
主分类号 |
H01L29/788 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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