发明名称 |
VIDEO ENCODER AND METHOD OF SYNCHRONIZING TIMING FROM ENCODER TO DECODER |
摘要 |
<P>PROBLEM TO BE SOLVED: To achieve multiplexing and synchronize transport packetizing devices. <P>SOLUTION: An apparatus for developing synchronization of an intermediate layer of signal such as the transport or multiplex layer of a multi-layered compressed video signal, includes at the encoding end of the system a counter 23 which is responsive to a system clock 22, and the count value is embedded in the signal at the transport layer according to a prescribed schedule. At the receiving end of the system, an inverse transport processing device 18 supplies a PCR and a control signal from auxiliary transport data to a system clock generator 27. The clock generator 27 is responsive to these signals and a system clock signal synchronized to operation of at least the inverse transport processing device 18 is generated. This system clock signal is supplied to a receiver system control device 26 in order to control a timing of processing elements. <P>COPYRIGHT: (C)2008,JPO&INPIT |
申请公布号 |
JP2008061272(A) |
申请公布日期 |
2008.03.13 |
申请号 |
JP20070258343 |
申请日期 |
2007.10.02 |
申请人 |
THOMSON CONSUMER ELECTRONICS INC |
发明人 |
DEISS MICHAEL S |
分类号 |
H04B1/66;G06T9/00;H03L7/085;H03L7/181;H04J3/00;H04L7/00;H04L7/02;H04L7/033;H04L12/70;H04L13/08;H04N7/08;H04N7/081;H04N7/173;H04N7/24;H04N7/62;H04N11/04;H04N19/00;H04N19/89;H04N21/236;H04N21/43;H04N21/434 |
主分类号 |
H04B1/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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