发明名称 JTAG POWER COLLAPSE DEBUG
摘要 A method of performing a debug operation on a processor after a power collapse is provided. An idle state of the processor is detected during an execution mode of the processor. The idle state is determined to be associated with a power collapse event. A debug state of the processor is restored by loading debug registers within the processor during the execution mode.
申请公布号 WO2007104027(A3) 申请公布日期 2008.03.13
申请号 WO2007US63603 申请日期 2007.03.08
申请人 QUALCOMM INCORPORATED;SEVERSON, MATTHEW, LEVI;BURKE, JOSEPH, PATRICK;POTTIER, PHILIP 发明人 SEVERSON, MATTHEW, LEVI;BURKE, JOSEPH, PATRICK;POTTIER, PHILIP
分类号 G06F11/36 主分类号 G06F11/36
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