EQUALIZATION FILTER CIRCUIT

摘要

An equalization filter circuit includes: a first transmission line having an input terminal (101) dependently connected to a plurality of first delay devices (104a); a second transmission line having an output terminal (102) dependently connected to a plurality of second delay devices (107a); a plurality of weighting circuits (105a) connected in parallel between the first transmission line and the second transmission line and having a gain which can be adjusted by a coefficient setting; and a variable adjusting circuit (108a) arranged at the output side of at least one weighting circuit (105a) for correcting fluctuation of output characteristics of the weighting circuits (105a).