发明名称 Memory cell access circuit
摘要 A circuit for accessing a memory cell includes a local bitline and a local sense amplifier having a plurality of transistors. The local bitline may be connect the memory cell and the sense amplifier. A first global bitline may be connected to a first one of the plurality of transistors. A second global bitline may be connected to a second one of the plurality of transistors. A secondary sense amplifier may be connected to the first and second global bitlines.
申请公布号 US7342839(B2) 申请公布日期 2008.03.11
申请号 US20060426102 申请日期 2006.06.23
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BARTH, JR. JOHN E.
分类号 G11C7/00 主分类号 G11C7/00
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