| 摘要 |
In case an input voltage is zero, to sufficiently shut off an output current, a source side of a first transistor T 1 is connected to the drains of fourth and fifth transistors T 4 and T 5 , and during a self-bias period of the first transistor T 1 , a source of the first transistor T 1 is made a second potential through the fourth transistor T 4 , and in a gate potential setting period of the first transistor T 1 by an input voltage Vin after the completion of the self-bias period, the source of the first transistor T 1 is made a third potential through the fifth transistor T 5.
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