发明名称 |
Shift register that suppresses operation failure due to transistor threshold variations, and liquid crystal driving circuit including the shift register |
摘要 |
A shift register having a plurality of stages connected in cascade shifts an output signal by a plurality of clocks having different phases. Each of the stage includes an input diode to which a signal is input from a preceding stage, a capacitor for holding charge having a voltage level of the input signal, a first transistor that is turned on or off by the held voltage level to output an output signal to a following stage in synchronization with a clock signal, and a second transistor connected between the input diode and an output terminal. A control electrode of the second transistor is connected to the input diode in the following stage. The second transistor has a clamping function for discharging the accumulated charge and turning off the first transistor when the clock signal is phase-shifted.
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申请公布号 |
US7336254(B2) |
申请公布日期 |
2008.02.26 |
申请号 |
US20050076823 |
申请日期 |
2005.03.09 |
申请人 |
ALPS ELECTRIC CO., LTD. |
发明人 |
IWASAKI CHISATO;FUJIYOSHI TATSUMI;YAMADA YUKIMITSU;KIKUCHI KOJI |
分类号 |
G02F1/133;G09G3/36;G09G3/20;G11C19/00;H04N5/66 |
主分类号 |
G02F1/133 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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