发明名称 Gate driver output stage with bias circuit for high and wide operating voltage range
摘要 A simple, low cost, gate driver and bias circuit provides for a wider operating voltage range exceeding the normal component breakdown voltage of components such as NMOS and PMOS transistors. A CMOS process with an epitaxial layer as bulk and p-type substrate is used to implement the circuit in this example.
申请公布号 US7336119(B2) 申请公布日期 2008.02.26
申请号 US20070760440 申请日期 2007.06.08
申请人 INTERNATIONAL RECTIFIER CORPORATION 发明人 JEONG JONG-DEOG
分类号 H03K17/687;H01L21/761;H01L27/092;H01L29/76;H01L31/113;H03K19/003 主分类号 H03K17/687
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